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Document INCR/FIXED/WRAP burst behavior in the module headers of axi_dw_converter, axi_dw_downsizer, and axi_dw_upsizer. Closes #429.
… interfaces. The original multi-dimensional interface module is not supported by many tools. Downstream users can still trivially write their own intf wrapper. Close #353.
…meter (#399) * src: axi_fifo_delay_dyn: Fix incorrect power-of-two check for `Depth` parameter The `axi_fifo_delay_dyn` module's parameter constraint checker incorrectly identified valid `Depth` values as not being a power of two. This commit corrects the logic to accurately verify that the `Depth` parameter is a power of two. * Update src/axi_fifo_delay_dyn.sv --------- Co-authored-by: Chen Wu <[email protected]>
* Bump to common_cells v2 * fix(cc): fix cc_ module parameter names for common_cells v2 Update parameter names to match the actual cc_ module API in v2-test: - cc_delta_counter: Width->WIDTH, StickyOverflow->STICKY_OVERFLOW - cc_stream_register: data_t->T - cc_fifo: FallThrough->FALL_THROUGH, Depth->DEPTH, data_t->dtype - cc_counter: Width->WIDTH Co-Authored-By: Claude Sonnet 4.6 <[email protected]> * hw: Align mux and demux to common_cells v2 * hw: Align params name to common cells v2-test * hw: Remove test_i ports * hw: clean up dead test_i ports and use cc_pkg::lzc_mode_e enum for the cc_lzc MODE parameter. * fixed indentation * bumped common-cells v2.0.0-beta and tech-cells-generic 0.2.14 * bumped common2 fixes for synopsis tools * scripts: add target cc_no_deprecated * deps: Bump `common_cells` to `v2.0.0-beta.2` --------- Co-authored-by: Lorenzo Leone <[email protected]> Co-authored-by: Claude Sonnet 4.6 <[email protected]> Co-authored-by: Chen Wu <[email protected]> Co-authored-by: Niccolò Giuliani <[email protected]>
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The
fuse_xsimCI job (FuseSoC + Vivado xsim) had been broken for a long time and was markedallow_failure, so xsim compatibility regressions went unnoticed. This PR fixes all the issues that made it fail and makes the job blocking again, restoring basic xsim test coverage.common_cellsandtech_cells_genericto revisions containing their own xsim/FuseSoC fixes.ifndef XILINX_SIMULATOR.axi.coreto align withBender.yml.axi.corein sync withBender.yml. Happy to revert it if not necessary or if it looks too cumbersome.common_cellsandtech_cells_generic.