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@pulp-platform

pulp-platform

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  1. Deeploy Deeploy Public

    DNN Compiler for Heterogeneous SoCs

    Python 76 48

  2. carfield carfield Public

    A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow on multiple boards is available.

    Tcl 129 36

  3. cheshire cheshire Public

    A minimal Linux-capable 64-bit RISC-V SoC built around CVA6

    Verilog 367 120

  4. snitch_cluster snitch_cluster Public

    An energy-efficient RISC-V floating-point compute cluster.

    C 148 116

  5. axi axi Public

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

    SystemVerilog 1.7k 373

  6. ara ara Public

    The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

    C 548 200

Repositories

Showing 10 of 332 repositories
  • mempool Public

    A scalable 256/1024-RISC-V-core system with low-latency access into shared L1 memory.

    pulp-platform/mempool's past year of commit activity
    C 328 Apache-2.0 61 3 6 Updated Sep 17, 2026
  • gwaihir Public

    aka Lago-Mio

    pulp-platform/gwaihir's past year of commit activity
    C 7 5 8 10 Updated Sep 17, 2026
  • bender Public

    A dependency management tool for hardware projects.

    pulp-platform/bender's past year of commit activity
    Rust 393 Apache-2.0 63 32 12 Updated Sep 17, 2026
  • cva6 Public Forked from openhwfoundation/cva6

    This is the fork of CVA6 intended for PULP development.

    pulp-platform/cva6's past year of commit activity
    Assembly 25 1,031 1 0 Updated Sep 17, 2026
  • iDMA Public

    A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)

    pulp-platform/iDMA's past year of commit activity
    SystemVerilog 239 60 21 14 Updated Sep 16, 2026
  • cheshire Public

    A minimal Linux-capable 64-bit RISC-V SoC built around CVA6

    pulp-platform/cheshire's past year of commit activity
    Verilog 367 120 21 29 Updated Sep 16, 2026
  • spatz Public

    Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.

    pulp-platform/spatz's past year of commit activity
    C 173 Apache-2.0 53 4 16 Updated Sep 16, 2026
  • spatz_vpu Public

    Spatz vector processing unit

    pulp-platform/spatz_vpu's past year of commit activity
    C 1 Apache-2.0 4 0 1 Updated Sep 16, 2026
  • FlooNoC Public

    A Fast, Low-Overhead On-chip Network

    pulp-platform/FlooNoC's past year of commit activity
    SystemVerilog 346 Apache-2.0 79 24 2 Updated Sep 16, 2026
  • axi Public

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

    pulp-platform/axi's past year of commit activity
    SystemVerilog 1,698 373 45 19 Updated Sep 16, 2026