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[JSC] Use 3-operand instructions more in Baseline / DFG
https://bugs.webkit.org/show_bug.cgi?id=289521 rdar://146728227 Reviewed by Michael Saboff. Use 3-operand instructions more in Baseline / DFG as it can reduce code size in ARM64. * Source/JavaScriptCore/assembler/MacroAssembler.h: (JSC::MacroAssembler::rshift32): (JSC::MacroAssembler::urshift32): * Source/JavaScriptCore/assembler/MacroAssemblerARM64.h: (JSC::MacroAssemblerARM64::rshift32): (JSC::MacroAssemblerARM64::urshift32): * Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h: (JSC::MacroAssemblerARMv7::rshift32): (JSC::MacroAssemblerARMv7::urshift32): * Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.h: (JSC::MacroAssemblerRISCV64::rshift32): (JSC::MacroAssemblerRISCV64::urshift32): * Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h: (JSC::MacroAssemblerX86_64::rshift32): (JSC::MacroAssemblerX86_64::urshift32): (JSC::MacroAssemblerX86_64::sub32): (JSC::MacroAssemblerX86_64::sub64): * Source/JavaScriptCore/dfg/DFGOSRExit.cpp: (JSC::DFG::OSRExit::compileExit): * Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp: * Source/JavaScriptCore/dfg/DFGSpeculativeJIT64.cpp: (JSC::DFG::SpeculativeJIT::nonSpeculativeNonPeepholeCompareNullOrUndefined): (JSC::DFG::SpeculativeJIT::nonSpeculativePeepholeBranchNullOrUndefined): (JSC::DFG::SpeculativeJIT::compileObjectToObjectOrOtherEquality): (JSC::DFG::SpeculativeJIT::compilePeepHoleObjectToObjectOrOtherEquality): (JSC::DFG::SpeculativeJIT::compileToBooleanObjectOrOther): (JSC::DFG::SpeculativeJIT::compileToBoolean): (JSC::DFG::SpeculativeJIT::emitObjectOrOtherBranch): (JSC::DFG::SpeculativeJIT::compile): * Source/JavaScriptCore/ftl/FTLOSRExitCompiler.cpp: (JSC::FTL::compileStub): * Source/JavaScriptCore/jit/AssemblyHelpers.cpp: (JSC::emitRandomThunkImpl): (JSC::AssemblyHelpers::wangsInt64Hash): * Source/JavaScriptCore/jit/JITBitAndGenerator.cpp: (JSC::JITBitAndGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITBitOrGenerator.cpp: (JSC::JITBitOrGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITBitXorGenerator.cpp: (JSC::JITBitXorGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITDivGenerator.cpp: (JSC::JITDivGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITInlines.h: (JSC::JIT::emitJumpIfNotInt): * Source/JavaScriptCore/jit/JITLeftShiftGenerator.cpp: (JSC::JITLeftShiftGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITNegGenerator.cpp: (JSC::JITNegGenerator::generateInline): (JSC::JITNegGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITOpcodes.cpp: (JSC::JIT::compileOpStrictEq): (JSC::JIT::compileOpStrictEqJump): * Source/JavaScriptCore/jit/JITRightShiftGenerator.cpp: (JSC::JITRightShiftGenerator::generateFastPath): * Source/JavaScriptCore/jit/JITSubGenerator.cpp: (JSC::JITSubGenerator::generateInline): (JSC::JITSubGenerator::generateFastPath): * Source/JavaScriptCore/jit/SetupVarargsFrame.cpp: (JSC::emitSetVarargsFrame): * Source/JavaScriptCore/yarr/YarrJIT.cpp: Canonical link: https://commits.webkit.org/292008@main
1 parent 11fcf7e commit 07c88b9

22 files changed

Lines changed: 353 additions & 221 deletions

‎Source/JavaScriptCore/assembler/MacroAssembler.h‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2337,7 +2337,7 @@ class MacroAssembler : public MacroAssemblerBase {
23372337

23382338
void lshift32(Imm32 amount, RegisterID shiftAmount, RegisterID dest)
23392339
{
2340-
lshift32(trustedImm32ForShift(amount), shiftAmount, dest);
2340+
lshift32(amount.asTrustedImm32(), shiftAmount, dest);
23412341
}
23422342

23432343
void rshift32(Imm32 imm, RegisterID dest)
@@ -2349,7 +2349,12 @@ class MacroAssembler : public MacroAssemblerBase {
23492349
{
23502350
rshift32(src, trustedImm32ForShift(amount), dest);
23512351
}
2352-
2352+
2353+
void rshift32(Imm32 amount, RegisterID shiftAmount, RegisterID dest)
2354+
{
2355+
rshift32(amount.asTrustedImm32(), shiftAmount, dest);
2356+
}
2357+
23532358
void urshift32(Imm32 imm, RegisterID dest)
23542359
{
23552360
urshift32(trustedImm32ForShift(imm), dest);
@@ -2360,6 +2365,11 @@ class MacroAssembler : public MacroAssemblerBase {
23602365
urshift32(src, trustedImm32ForShift(amount), dest);
23612366
}
23622367

2368+
void urshift32(Imm32 amount, RegisterID shiftAmount, RegisterID dest)
2369+
{
2370+
urshift32(amount.asTrustedImm32(), shiftAmount, dest);
2371+
}
2372+
23632373
void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)
23642374
{
23652375
if (hasOneBitSet(imm.m_value)) {

‎Source/JavaScriptCore/assembler/MacroAssemblerARM64.h‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1321,6 +1321,12 @@ class MacroAssemblerARM64 : public AbstractMacroAssembler<Assembler> {
13211321
m_assembler.asr<32>(dest, src, imm.m_value & 0x1f);
13221322
}
13231323

1324+
void rshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
1325+
{
1326+
move(imm, getCachedDataTempRegisterIDAndInvalidate());
1327+
m_assembler.asr<32>(dest, dataTempRegister, shiftAmount);
1328+
}
1329+
13241330
void rshift32(RegisterID shiftAmount, RegisterID dest)
13251331
{
13261332
rshift32(dest, shiftAmount, dest);
@@ -1485,6 +1491,12 @@ class MacroAssemblerARM64 : public AbstractMacroAssembler<Assembler> {
14851491
m_assembler.lsr<32>(dest, src, imm.m_value & 0x1f);
14861492
}
14871493

1494+
void urshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
1495+
{
1496+
move(imm, getCachedDataTempRegisterIDAndInvalidate());
1497+
m_assembler.lsr<32>(dest, dataTempRegister, shiftAmount);
1498+
}
1499+
14881500
void urshift32(RegisterID shiftAmount, RegisterID dest)
14891501
{
14901502
urshift32(dest, shiftAmount, dest);

‎Source/JavaScriptCore/assembler/MacroAssemblerARMv7.h‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -606,6 +606,14 @@ class MacroAssemblerARMv7 : public AbstractMacroAssembler<Assembler> {
606606
rshift32(dest, imm, dest);
607607
}
608608

609+
void rshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
610+
{
611+
// Clamp the shift to the range 0..31
612+
m_assembler.ARM_and(dest, shiftAmount, ARMThumbImmediate::makeEncodedImm(0x1f));
613+
move(imm, getCachedDataTempRegisterIDAndInvalidate());
614+
m_assembler.asr(dest, dataTempRegister, dest);
615+
}
616+
609617
void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)
610618
{
611619
RegisterID scratch = getCachedDataTempRegisterIDAndInvalidate();
@@ -635,6 +643,14 @@ class MacroAssemblerARMv7 : public AbstractMacroAssembler<Assembler> {
635643
urshift32(dest, imm, dest);
636644
}
637645

646+
void urshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
647+
{
648+
// Clamp the shift to the range 0..31
649+
m_assembler.ARM_and(dest, shiftAmount, ARMThumbImmediate::makeEncodedImm(0x1f));
650+
move(imm, getCachedDataTempRegisterIDAndInvalidate());
651+
m_assembler.lsr(dest, dataTempRegister, dest);
652+
}
653+
638654
void addUnsignedRightShift32(RegisterID src1, RegisterID src2, TrustedImm32 amount, RegisterID dest)
639655
{
640656
// dest = src1 + (src2 >> amount)

‎Source/JavaScriptCore/assembler/MacroAssemblerRISCV64.h‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -728,6 +728,14 @@ class MacroAssemblerRISCV64 : public AbstractMacroAssembler<Assembler> {
728728
m_assembler.maskRegister<32>(dest);
729729
}
730730

731+
void rshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
732+
{
733+
auto temp = temps<Data>();
734+
move(imm, temp.data());
735+
m_assembler.srawInsn(dest, temp.data(), shiftAmount);
736+
m_assembler.maskRegister<32>(dest);
737+
}
738+
731739
void rshift64(RegisterID shiftAmount, RegisterID dest)
732740
{
733741
rshift64(dest, shiftAmount, dest);
@@ -772,6 +780,14 @@ class MacroAssemblerRISCV64 : public AbstractMacroAssembler<Assembler> {
772780
m_assembler.maskRegister<32>(dest);
773781
}
774782

783+
void urshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
784+
{
785+
auto temp = temps<Data>();
786+
move(imm, temp.data());
787+
m_assembler.srlwInsn(dest, temp.data(), shiftAmount);
788+
m_assembler.maskRegister<32>(dest);
789+
}
790+
775791
void addUnsignedRightShift32(RegisterID src1, RegisterID src2, TrustedImm32 amount, RegisterID dest)
776792
{
777793
// dest = src1 + (src2 >> amount)

‎Source/JavaScriptCore/assembler/MacroAssemblerX86_64.h‎

Lines changed: 39 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -801,6 +801,18 @@ class MacroAssemblerX86_64 : public AbstractMacroAssembler<Assembler> {
801801
rshift32(imm, dest);
802802
}
803803

804+
void rshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
805+
{
806+
if (shiftAmount == dest) {
807+
move(imm, scratchRegister());
808+
rshift32(shiftAmount, scratchRegister());
809+
move(scratchRegister(), dest);
810+
} else {
811+
move(imm, dest);
812+
rshift32(shiftAmount, dest);
813+
}
814+
}
815+
804816
void urshift32(RegisterID shift_amount, RegisterID dest)
805817
{
806818
if (shift_amount == X86Registers::ecx)
@@ -836,6 +848,18 @@ class MacroAssemblerX86_64 : public AbstractMacroAssembler<Assembler> {
836848
urshift32(imm, dest);
837849
}
838850

851+
void urshift32(TrustedImm32 imm, RegisterID shiftAmount, RegisterID dest)
852+
{
853+
if (shiftAmount == dest) {
854+
move(imm, scratchRegister());
855+
urshift32(shiftAmount, scratchRegister());
856+
move(scratchRegister(), dest);
857+
} else {
858+
move(imm, dest);
859+
urshift32(shiftAmount, dest);
860+
}
861+
}
862+
839863
void rotateRight32(TrustedImm32 imm, RegisterID dest)
840864
{
841865
m_assembler.rorl_i8r(imm.m_value, dest);
@@ -914,6 +938,10 @@ class MacroAssemblerX86_64 : public AbstractMacroAssembler<Assembler> {
914938
add32(left, dest);
915939
return;
916940
}
941+
if (left == right) {
942+
move(TrustedImm32(0), dest);
943+
return;
944+
}
917945
move(left, dest);
918946
sub32(right, dest);
919947
}
@@ -5539,16 +5567,19 @@ class MacroAssemblerX86_64 : public AbstractMacroAssembler<Assembler> {
55395567
m_assembler.subq_rr(src, dest);
55405568
}
55415569

5542-
void sub64(RegisterID a, RegisterID b, RegisterID dest)
5570+
void sub64(RegisterID left, RegisterID right, RegisterID dest)
55435571
{
5544-
if (b != dest) {
5545-
move(a, dest);
5546-
sub64(b, dest);
5547-
} else if (a != b) {
5548-
neg64(b);
5549-
add64(a, b);
5550-
} else
5572+
if (dest == right) {
5573+
neg64(dest);
5574+
add64(left, dest);
5575+
return;
5576+
}
5577+
if (left == right) {
55515578
move(TrustedImm32(0), dest);
5579+
return;
5580+
}
5581+
move(left, dest);
5582+
sub64(right, dest);
55525583
}
55535584

55545585
void sub64(TrustedImm32 imm, RegisterID dest)

‎Source/JavaScriptCore/dfg/DFGOSRExit.cpp‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -397,8 +397,7 @@ void OSRExit::compileExit(CCallHelpers& jit, VM& vm, const OSRExit& exit, const
397397
jit.load8(AssemblyHelpers::Address(scratch1, Structure::indexingModeIncludingHistoryOffset()), scratch1);
398398
#endif
399399
jit.and32(AssemblyHelpers::TrustedImm32(IndexingModeMask), scratch1);
400-
jit.move(AssemblyHelpers::TrustedImm32(1), scratch2);
401-
jit.lshift32(scratch1, scratch2);
400+
jit.lshift32(AssemblyHelpers::TrustedImm32(1), scratch1, scratch2);
402401
storeArrayModes.link(&jit);
403402
jit.or32(scratch2, AssemblyHelpers::AbsoluteAddress(arrayProfile->addressOfArrayModes()));
404403

‎Source/JavaScriptCore/dfg/DFGSpeculativeJIT.cpp‎

Lines changed: 48 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -5140,28 +5140,34 @@ void SpeculativeJIT::compileArithSub(Node* node)
51405140
int32_t imm2 = node->child2()->asInt32();
51415141
GPRTemporary result(this);
51425142

5143-
if (!shouldCheckOverflow(node->arithMode())) {
5144-
move(op1.gpr(), result.gpr());
5145-
sub32(Imm32(imm2), result.gpr());
5146-
} else {
5143+
GPRReg op1GPR = op1.gpr();
5144+
GPRReg resultGPR = result.gpr();
5145+
5146+
if (!shouldCheckOverflow(node->arithMode()))
5147+
sub32(op1GPR, Imm32(imm2), resultGPR);
5148+
else {
51475149
GPRTemporary scratch(this);
5148-
speculationCheck(ExitKind::Overflow, JSValueRegs(), nullptr, branchSub32(Overflow, op1.gpr(), Imm32(imm2), result.gpr(), scratch.gpr()));
5150+
GPRReg scratchGPR = scratch.gpr();
5151+
speculationCheck(ExitKind::Overflow, JSValueRegs(), nullptr, branchSub32(Overflow, op1GPR, Imm32(imm2), resultGPR, scratchGPR));
51495152
}
51505153

5151-
strictInt32Result(result.gpr(), node);
5154+
strictInt32Result(resultGPR, node);
51525155
return;
51535156
}
51545157

51555158
if (node->child1()->isInt32Constant()) {
51565159
int32_t imm1 = node->child1()->asInt32();
51575160
SpeculateInt32Operand op2(this, node->child2());
51585161
GPRTemporary result(this);
5162+
5163+
GPRReg op2GPR = op2.gpr();
5164+
GPRReg resultGPR = result.gpr();
51595165

5160-
move(Imm32(imm1), result.gpr());
5166+
move(Imm32(imm1), resultGPR);
51615167
if (!shouldCheckOverflow(node->arithMode()))
5162-
sub32(op2.gpr(), result.gpr());
5168+
sub32(op2GPR, resultGPR);
51635169
else
5164-
speculationCheck(ExitKind::Overflow, JSValueRegs(), nullptr, branchSub32(Overflow, op2.gpr(), result.gpr()));
5170+
speculationCheck(ExitKind::Overflow, JSValueRegs(), nullptr, branchSub32(Overflow, op2GPR, resultGPR));
51655171

51665172
strictInt32Result(result.gpr(), node);
51675173
return;
@@ -5171,13 +5177,16 @@ void SpeculativeJIT::compileArithSub(Node* node)
51715177
SpeculateInt32Operand op2(this, node->child2());
51725178
GPRTemporary result(this);
51735179

5174-
if (!shouldCheckOverflow(node->arithMode())) {
5175-
move(op1.gpr(), result.gpr());
5176-
sub32(op2.gpr(), result.gpr());
5177-
} else
5178-
speculationCheck(ExitKind::Overflow, JSValueRegs(), nullptr, branchSub32(Overflow, op1.gpr(), op2.gpr(), result.gpr()));
5180+
GPRReg op1GPR = op1.gpr();
5181+
GPRReg op2GPR = op2.gpr();
5182+
GPRReg resultGPR = result.gpr();
51795183

5180-
strictInt32Result(result.gpr(), node);
5184+
if (!shouldCheckOverflow(node->arithMode()))
5185+
sub32(op1GPR, op2GPR, resultGPR);
5186+
else
5187+
speculationCheck(ExitKind::Overflow, JSValueRegs(), nullptr, branchSub32(Overflow, op1GPR, op2GPR, resultGPR));
5188+
5189+
strictInt32Result(resultGPR, node);
51815190
return;
51825191
}
51835192

@@ -5193,20 +5202,31 @@ void SpeculativeJIT::compileArithSub(Node* node)
51935202
SpeculateWhicheverInt52Operand op1(this, node->child1());
51945203
SpeculateWhicheverInt52Operand op2(this, node->child2(), op1);
51955204
GPRTemporary result(this, Reuse, op1);
5196-
move(op1.gpr(), result.gpr());
5197-
sub64(op2.gpr(), result.gpr());
5198-
int52Result(result.gpr(), node, op1.format());
5205+
5206+
GPRReg op1GPR = op1.gpr();
5207+
GPRReg op2GPR = op2.gpr();
5208+
GPRReg resultGPR = result.gpr();
5209+
5210+
sub64(op1GPR, op2GPR, resultGPR);
5211+
int52Result(resultGPR, node, op1.format());
51995212
return;
52005213
}
52015214

52025215
SpeculateInt52Operand op1(this, node->child1());
52035216
SpeculateInt52Operand op2(this, node->child2());
52045217
GPRTemporary result(this);
5205-
move(op1.gpr(), result.gpr());
5206-
speculationCheck(
5207-
Int52Overflow, JSValueRegs(), nullptr,
5208-
branchSub64(Overflow, op2.gpr(), result.gpr()));
5209-
int52Result(result.gpr(), node);
5218+
5219+
GPRReg op1GPR = op1.gpr();
5220+
GPRReg op2GPR = op2.gpr();
5221+
GPRReg resultGPR = result.gpr();
5222+
5223+
#if CPU(ARM64)
5224+
speculationCheck(Int52Overflow, JSValueRegs(), nullptr, branchSub64(Overflow, op1GPR, op2GPR, resultGPR));
5225+
#else
5226+
move(op1GPR, resultGPR);
5227+
speculationCheck(Int52Overflow, JSValueRegs(), nullptr, branchSub64(Overflow, op2GPR, resultGPR));
5228+
#endif
5229+
int52Result(resultGPR, node);
52105230
return;
52115231
}
52125232
#endif // USE(JSVALUE64)
@@ -5216,11 +5236,12 @@ void SpeculativeJIT::compileArithSub(Node* node)
52165236
SpeculateDoubleOperand op2(this, node->child2());
52175237
FPRTemporary result(this, op1);
52185238

5219-
FPRReg reg1 = op1.fpr();
5220-
FPRReg reg2 = op2.fpr();
5221-
subDouble(reg1, reg2, result.fpr());
5239+
FPRReg op1FPR = op1.fpr();
5240+
FPRReg op2FPR = op2.fpr();
5241+
FPRReg resultFPR = result.fpr();
52225242

5223-
doubleResult(result.fpr(), node);
5243+
subDouble(op1FPR, op2FPR, resultFPR);
5244+
doubleResult(resultFPR, node);
52245245
return;
52255246
}
52265247

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